Today we stumble upon an Apple patent that reveals how the design of its M1 processor has been modified to launch a vastly more powerful successor, and it’s all about a new multi-tier hybrid memory subsystem that combines the main DRAM memory of the system next to a DRAM memory which acts as a high bandwidth cache. Apple itself explains it in the registered patent:
“With two types of DRAM forming the memory system, one of which can be optimized for bandwidth and the other can be optimized for capacity, the objectives of increasing bandwidth and increasing capacity can be performed, in some embodiments to implement energy efficiency improvements, which can provide a highly energy efficient memory solution that is also high performance and high bandwidth. “
Apple’s patent, titled “memory system that has combined high-density, low-bandwidth and low-density, high-bandwidth memories“describes various SoCs that use a high-bandwidth cache DRAM as well as high-capacity main DRAM. The patent refers strictly to SoCs, so it is assumed that all DRAMs are soldered to silicon, just like than the LPDDR4X memory chips that Apple uses in its M1 SoC. The architecture described in this same patent indicates that Apple does not foresee the use of standard memory modules, so we will have to wait to see what the company is preparing.