Micron Technology will launch mass production of its G11 3D NAND memory in the second half of 2027, delivering double the storage density and a 50% boost in I/O performance. As telset.id reported, the upcoming hardware aims to tackle surging demands in AI data centers and high-capacity client storage through advanced wafer-on-wafer bonding.
Micron Sets 2027 Production for G11 3D NAND
Micron Technology confirmed plans to push its next-generation G11 3D NAND architecture into mass production during the second half of 2027. The company’s president and chief technology and products officer, Scott DeBoer, described the platform during a corporate event as the most advanced NAND technology in the world. The design centers on wafer-on-wafer bonding; Micron now builds separate semiconductor wafers using different manufacturing processes before fusing them together. One wafer handles the memory array using a new 3D NAND node, while a separate wafer utilizes a logic fabrication process for peripheral and I/O circuits.
This manufacturing strategy mirrors approaches previously adopted by rival manufacturer YMTC. While Micron previously relied on CMOS-under-array architectures across several generations, wafer-on-wafer bonding provides distinct operational flexibility. It lets engineers optimize the memory array and the peripheral logic independently, yielding higher storage capacity and faster data transfer rates without inflating chip footprints.
Performance Gains and Power Reductions
The G11 architecture targets a substantial leap in operational metrics. Micron aims to drive input/output speeds from 3,600 megatransfers per second up to 5,400 MT/s, representing a 50% speed increase. At the same time, energy consumption required for data transfer per bit drops by more than 25%. These efficiency gains directly benefit conventional high-capacity solid-state drives used in client devices and enterprise data centers, while also catering to artificial intelligence workloads that demand extreme bandwidth.
Transitioning Past 400 Active Layers
The G11 node moves the industry past the 400-layer mark for active wordline layers, though Micron has not yet disclosed the exact count of active layers or memory decks. The company emphasized that G11 will feature an industry-leading memory cell pitch, indicating that density improvements stem from a combination of vertical stacking and shrinking cell dimensions.
To continue scaling beyond G11, Micron is developing high-mobility materials and ultra-dense cell architectures. These engineering steps allow the company to shrink cell dimensions along the X and Y axes while keeping manufacturing complexity manageable. DeBoer noted that future roadmaps rely on a blend of vertical layer expansion and horizontal cell reduction, rather than depending solely on stacking more layers.
When Micron will manufacture G11 3D NAND memory?
When will Micron begin manufacturing G11 3D NAND memory?
Mass production is scheduled to begin in the second half of 2027, with comprehensive technical details slated for release closer to that launch window.
What manufacturing change makes G11 different from older Micron NAND?
G11 introduces wafer-on-wafer bonding, allowing Micron to build memory arrays and logic peripheral circuits on separate wafers using different fabrication processes before combining them.
How does G11 improve speed and energy efficiency?
Micron targets a 50% increase in I/O speeds, moving from 3,600 MT/s to 5,400 MT/s, while cutting data transfer energy consumption by more than 25% per bit.