NVIDIA released the CUDA Toolkit 13.4, adding native support for Windows on Arm systems alongside a modernized Multi-Process Service and a preview of the upcoming Rubin GPU architecture, according to NVIDIA’s developer blog and official release notes. The update enables developers to compile CUDA code directly on Windows Arm64 devices for the first time, bridging a capability gap that previously limited Windows users to x86 processors while Linux supported Arm hardware.
Native Windows on Arm Support and Cross-Compilation
According to official NVIDIA documentation, CUDA Toolkit 13.4 extends application support beyond traditional Linux environments to the Windows on Arm platform. Developers can now perform native compilation directly on Windows Arm64 systems without relying on an intermediate platform. Alternatively, developers working from standard x86-64 machines can specify Arm64 as a target platform using cross-compilation features built into the toolkit.
This software release arrives ahead of hardware rollouts such as the anticipated RTX Spark platform, which pairs a 20-core Grace CPU with a Blackwell architecture GPU containing 6,144 CUDA cores, according to hardware reporting by VideoCardz and WCCFTech. The upcoming ecosystem is designed to deliver high FP4 AI performance to run local large language models directly on laptop hardware.
Multi-Process Service V3 and Resource Control
To address performance management on shared hardware, NVIDIA introduced Multi-Process Service V3 (MPS V3) in the 13.4 release. According to NVIDIA’s technical blog, MPS V3 redesigns the control layer for managing concurrent workloads on a single GPU, replacing rudimentary configuration tools with a system tailored for containerized environments.
The updated service incorporates several distinct management upgrades:
- Scriptable CLI: Administrators can manage named server instances via scripts instead of manual configuration.
- TOML Configuration: Settings utilize a human-readable, versionable format.
- Namespaces: Multiple MPS instances remain clearly separated from one another.
- Cgroup Integration: GPU memory limits are enforced directly via cgroups alongside streaming multiprocessor (SM) partition controls.
These additions give administrators precise control over compute performance, memory boundaries, and execution priorities when multiple processes access a single GPU.
Rubin Architecture Preview and Compute Fabric Transport
CUDA 13.4 includes early developer access to the upcoming NVIDIA Rubin architecture, designated with compute capability 10.7, according to NVIDIA. The preview allows engineering teams to begin porting and testing applications ahead of Rubin’s general availability.
Additionally, the release introduces CUDA Compute Fabric Transport (CFT). According to NVIDIA, CFT provides a transport-centric API for advanced applications and communication libraries to move data across NVLink fabrics at scale. By targeting named logical endpoints using endpoint IDs and offsets rather than mapping every remote GPU allocation into a process virtual address space, CFT reduces virtual-address pressure in large multi-GPU systems. The toolkit also updates companion libraries, including CUDA Python 1.1.0 and CCCL 3.4, which introduces performance improvements for DeviceScan operations on Blackwell hardware.
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