AI infrastructure startup Tensordyne has moved to the fabrication stage for its first commercial AI accelerator, the Napier chip, utilizing TSMC’s 3nm process. By replacing traditional hardware multiplication with logarithmic approximations, the company claims its architecture can achieve significantly higher token-per-watt efficiency than current industry-standard GPUs, targeting a 2027 production window for its rack-scale systems.
How Tensordyne Reimagines Matrix Multiplication
Traditional AI accelerators rely on multiply-accumulate (MAC) units to process the massive datasets required for deep learning. In standard binary arithmetic, multiplication is computationally expensive compared to addition. Tensordyne, according to company co-founder Gilles Backhus, bypasses this by converting values into logarithms, where the mathematical operation of multiplication simplifies into basic addition (log(a) + log(b)).
To manage the conversion process without the memory overhead of large lookup tables, the company utilizes the Mitchell approximation—a heuristic method for estimating log and antilog values. To ensure these approximations maintain the precision required for large-scale neural networks, Tensordyne has integrated a section-wise hardware correction mechanism. This allows the chip to achieve accuracy levels comparable to standard FP16 floating-point formats while maintaining support for FP8 and 4-bit block floating-point data types.
Technical Specifications of the Napier Accelerator
The Napier chip is designed to compete with high-end inference accelerators, featuring 144 GB of HBM3e memory across four stacks and a memory bandwidth of 4.7 TB/s. With a nominal thermal design power (TDP) of 300 watts, the hardware aims to deliver 2.1 petaFLOPS of dense FP8 performance.
While these specifications mirror the performance profile of Nvidia’s H200 accelerators, Tensordyne claims a power efficiency advantage of nearly 60 percent. The company’s rack-scale deployment, the TDN72, bundles 72 of these accelerators into a single system. According to internal projections provided by the company, this configuration aims for 17 times the tokens-per-watt efficiency and 13 times the throughput of current Nvidia Blackwell-based systems. These performance metrics remain unverified by independent third-party benchmarks, as the hardware is not scheduled for full-scale availability until 2027.
Deployment and Infrastructure Requirements
A significant challenge for modern AI datacenters is the move toward liquid cooling necessitated by high-power-density chips. Tensordyne aims to simplify integration into existing “brownfield” datacenters by utilizing air-cooled compute blades. Each TDN72 rack consists of eight compute blades, each housing a 10-core Intel Xeon-D host CPU and nine Napier accelerators.
The system uses a high-speed all-to-all fabric developed in partnership with Juniper Networks, which connects each chip to six proprietary fabric switch blades. This architecture allows for a density of 608 petaFLOPS in a 120 kW footprint. Because the system is air-cooled and designed to fit into standard 52U server racks, Tensordyne positions itself as a lower-friction alternative for cloud providers, such as Cirrascale and BlueSky Compute, that may lack the infrastructure for high-density liquid cooling.
Software Compatibility and Market Outlook
The primary hurdle for any new AI hardware startup is software ecosystem support. Tensordyne has focused on developing a compiler capable of converting existing models to run on its proprietary architecture, an approach similar to that taken by competitors like Tenstorrent.
For inference, the company intends to provide a proprietary serving platform while ensuring compatibility with established environments like vLLM. While the company reports that PyTorch support is currently under development, the success of the platform will likely depend on its ability to handle complex, trillion-parameter models without requiring extensive manual quantization by the end-user. With a release window set for Q2 or Q3 of 2027, the company faces a rapidly shifting competitive landscape, including upcoming hardware generations from Nvidia, such as the Vera Rubin architecture.
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